To ensure reliable operation of devices that contain digital circuits, designers attempt to limit or minimize fluctuations in supply voltage. The fluctuations of a supply voltage can have static and dynamic portions. The static portion is often attributable to tolerances of components within the circuitry used to generate the supply voltage. The dynamic portion of the fluctuations is often primarily attributable to changes in load (e.g., change in power requirements for a load). In conventional circuits, load changes with factors of up to 10 are quite commonplace, and can occur from one clock to the next, which often equates to a few nanoseconds.
FIG. 1 shows a prior art digital circuit 100. This digital circuit 100 has a voltage source 102 with a capacitor 104 coupled to its output, wherein the voltage source 102 feeds a circuit block 106 arranged on a circuit board or a chip 108. The lines coupling the voltage source 102 to the circuit block 106 are symbolized by two parasitic resistors 110 and two parasitic inductors 112. To optimize delivery of power from the voltage source 102, blocking capacitors 114 are provided, which serve to buffer charge for load changes.
As can be seen from FIG. 2, if the circuit block 106 is initially in a low current state during time 202 (e.g., requiring 50 mA) and is at time 204 switched to a high current state (e.g., requiring 350 mA), a sudden change in 300 mA of current is required (e.g., within a duration of 10 ns). In mobile telephones, for example, the low current state can be used for low performance applications (e.g., mp3 or speech processing), and the high current state can be used for high performance applications (e.g., high-speed data transfer and multi-media processing). The blocking capacitors 114 provided in FIG. 1 are either too slow or too small to be able to balance out these sudden load changes, causing voltage fluctuations 206 and 208 to arise in the supply voltage VDD′ (relative to VSS′). These dynamic voltage fluctuations can be +/−50 mV, so that the supply voltage VDD′ can fluctuate between VDDmax and VDDmin. This fluctuation in amplitude at low supply voltages of around 1V can cause the switching speed of devices in the circuit block 106 to be reduced by up to 10% during periods of up to several μs.
Although the use of blocking capacitors 114 may mitigate these supply voltage fluctuations 206, 208 somewhat, on-chip blocking capacitors alone are less than ideal for several reasons. For example, on-chip capacitors mostly have only low capacitances and are expensive in terms of their chip area requirement. Therefore, blocking capacitors are not in-and-of-themselves sufficient to eliminate or reduce the dynamic fluctuations of the supply voltage.
Consequently, the inventors have developed improved techniques for eliminating or reducing the dynamic fluctuations in a supply voltage VDD′.